The disclosed embodiments of the present invention relate to current and resistance compensation, and more particularly, to a calibration method and related apparatus for current and resistance.
In accordance with the related art, the transmitting end of the conventional communication system usually needs calibration processes for precision operation, especially certain current and resistance calibration. Typical current calibration methods, however, usually have some problems. For example, one of the typical current calibration methods needs to spend a lot of time upon simulation in the design phase, which can not be done for one more time after associated circuits are calibrated. For another example, another one of the typical current calibration methods needs high-cost hardware resources, such as high-resolution analog-to-digital converter(s) and high-speed computing circuit(s). For yet another example, yet another one of the typical current calibration methods needs a relatively increased chip area, thus resulting in increased associated cost. Therefore, there is a need for a novel method to enhance the control of current and resistance compensation under the condition of not introducing any side effects.